00:20.52 |
*** join/#brlcad Twingy
(n=justin@74.92.144.217) |
02:16.37 |
*** join/#brlcad yukonbob
(i=1000@s142-179-54-198.bc.hsia.telus.net) [NETSPLIT
VICTIM] |
02:16.37 |
*** join/#brlcad vedge
(i=vedge@vedge.org) [NETSPLIT VICTIM] |
04:19.01 |
*** join/#brlcad louipc
(n=louipc@206-248-165-55.dsl.teksavvy.com) |
07:06.09 |
*** join/#brlcad d_rossberg
(n=rossberg@bz.bzflag.bz) |
07:10.30 |
*** join/#brlcad clock_
(n=clock@zux221-122-143.adsl.green.ch) |
09:26.25 |
*** join/#brlcad cad71
(n=53060ec3@bz.bzflag.bz) |
11:00.03 |
*** join/#brlcad Axman6
(n=Axman6@210-9-143-173.netspeed.com.au) |
11:04.52 |
*** join/#brlcad mafm
(n=mafm@elnet-111.lip.pt) |
11:06.45 |
mafm |
hallo |
11:12.43 |
*** join/#brlcad cad81
(n=29d14bd3@bz.bzflag.bz) |
11:34.18 |
*** join/#brlcad thing0
(n=ric@123.208.172.250) |
11:34.29 |
thing0 |
hey |
11:52.20 |
*** part/#brlcad thing0
(n=ric@123.208.172.250) |
11:59.39 |
*** join/#brlcad CIA-20
(n=CIA@208.69.182.149) |
12:00.23 |
Axman6 |
brlcad: yt? |
12:01.09 |
Axman6 |
or any devs really... |
12:03.04 |
pacman87 |
~ask |
12:03.04 |
ibot |
ask is probably Questions in the channel
should be specific, informative, complete, concise, and on-topic.
Don't ask if you can ask a question first. Don't ask if a person
is there; just ask what you intended to ask them. Better questions
more frequently yield better answers. We are all here voluntarily
or against our will. |
12:03.58 |
alex_joni |
pacman87: I assume the "against our will"
applies more frequently.. :) |
12:07.55 |
Axman6 |
well i was just looking for a discussion on
some stuff. i was wondering if veclib (specifically the vForce
stuff) was being used in brl-cad on OS X (or whether it would be at
all useful) |
12:10.05 |
Axman6 |
has functions that do things like "Set y[i] to
the exponential function of x[i], for i=0,..,n-1" that uses the
vector engine on 32, 64 bit, PowerPC and Intel procs, and uses them
fully. |
12:30.15 |
*** join/#brlcad CIA-21
(n=CIA@208.69.182.149) |
12:33.17 |
*** join/#brlcad thing0
(n=ric@58.171.117.63) |
12:33.35 |
Axman6 |
i think i killed CIA-20... |
12:40.45 |
alex_joni |
Axman6: nope, it's beeing restarted |
13:00.20 |
brlcad |
Axman6: nope, it's not being used for
anything |
13:00.51 |
Axman6 |
would it be at all helpful? |
13:01.14 |
brlcad |
where would you hook it in? :) |
13:02.06 |
Axman6 |
i dunno, you're the dev :P |
13:02.12 |
Axman6 |
i'm just the ideas man! |
13:02.13 |
brlcad |
vector libs works best when they are fully
integrated vertically |
13:02.40 |
Axman6 |
what do you mean? |
13:03.21 |
brlcad |
aside from being platform specific, which
historically we've avoided for longevity/portability/maintenance as
they tend to come and go into popularity over the years |
13:03.44 |
Axman6 |
ah, fair enough. thought you might say
that |
13:03.49 |
Axman6 |
still... it looks cool :P |
13:03.54 |
clock_ |
brlcad: platforms are like fads ;-) |
13:03.55 |
brlcad |
what I mean is that of course it's been
thought about ;) but it's not just a matter of "just using it" in
the least |
13:04.07 |
Axman6 |
yeah |
13:04.55 |
*** join/#brlcad docelic
(n=docelic@78.134.192.78) |
13:05.03 |
Axman6 |
oh well, just a thought. seems like it's the
sort of thing brl-cad would do a lot of, and the routines used here
are designed to be _fast_. (not that brl-cad needs much help
there) |
13:05.11 |
brlcad |
even if we hooked it into the few places in
our math library as a backend, you wouldn't likely see any
performance gains because it wouldn't be pervasive |
13:05.25 |
brlcad |
you'd still end up stalling the vector unit
every few intructions |
13:05.36 |
Axman6 |
how come? |
13:05.52 |
clock_ |
brlcad: I still didn't do the last bit to
finish the video into releasability :( |
13:05.59 |
Axman6 |
i'm not all that familiar (at all) with the
workings of brl-cad |
13:06.55 |
brlcad |
Axman6: because of the way vector math works,
they get their speed by keeping a vector pipeline fed and crossing
the boundary from system mem to the vector units
infrequently |
13:07.31 |
brlcad |
without vertical integration where you
restructure all computations specifically around that, you don't
get those speed benefits because the pipeline isn't fed |
13:07.37 |
brlcad |
it stalls |
13:07.46 |
brlcad |
you can actually end up running
slower |
13:07.47 |
Axman6 |
i thought that the point of this library was
to do that as fast as it could be done. i could be wrong
though. |
13:08.01 |
Axman6 |
interesting |
13:08.10 |
brlcad |
you're just reading the marketing materials,
there's a lot more to it |
13:08.49 |
Axman6 |
i'm sure this'll all make more sense once once
i've finished my 5 years at uni |
13:09.07 |
brlcad |
they're intentionally written as OMG!! *FAST*
ponies!?!! |
13:09.49 |
Axman6 |
well i'm reading the header file, which just
tells you what it does |
13:10.08 |
brlcad |
there have been efforts to take advantage of
vectorization, but that requires a fair bit of data
restructuring |
13:10.53 |
brlcad |
if someone(tm) implemented all of the vshot()
routines in librt, then a vector lib would be more
beneficial |
13:10.56 |
Axman6 |
fair enough. i wasn't sure how data was
represented in the source |
13:11.02 |
brlcad |
but just hooking it in to the math lib
wouldn't help |
13:12.05 |
Axman6 |
what does vshot() do? |
13:15.55 |
brlcad |
shoots a bundle of rays at a
primitive |
13:16.00 |
brlcad |
vectorized |
13:16.14 |
CIA-21 |
BRL-CAD: 03bob1961 * r30978
10/brlcad/trunk/misc/win32-msvc8/brlcad/brlcad.sln: Added libged
and support for x64. |
13:16.30 |
Axman6 |
anyway, i had better get to sleep. i've got
google tech talk to watch tomorrow ay ANU :) |
13:16.37 |
Axman6 |
at* |
13:17.01 |
Axman6 |
night all, and don't have too much fun or
you'll hurt yourselves! |
13:18.00 |
brlcad |
cya |
13:18.11 |
CIA-21 |
BRL-CAD: 03bob1961 * r30979
10/brlcad/trunk/misc/win32-msvc8/ (143 files in 143 dirs): Added
builds for x64. |
13:33.38 |
*** join/#brlcad prasad_
(n=psilva@h-67-103-183-185.mclnva23.covad.net) |
13:44.20 |
*** join/#brlcad pacman_87
(n=timothy@nat-204-179.arlut.utexas.edu) |
14:06.29 |
*** join/#brlcad docelic_
(n=docelic@78.134.199.54) |
14:10.32 |
*** join/#brlcad whymarkwh
(i=dsfsdfsd@196.211.34.3) |
14:14.09 |
*** part/#brlcad whymarkwh
(i=dsfsdfsd@196.211.34.3) |
14:34.39 |
CIA-21 |
BRL-CAD: 03bob1961 * r30980
10/brlcad/trunk/src/libbu/magic.c: Include bu.h |
14:37.21 |
CIA-21 |
BRL-CAD: 03bob1961 * r30981
10/brlcad/trunk/src/libbn/globals.c: Include bn.h |
14:40.52 |
*** join/#brlcad prasad_
(n=psilva@h-67-103-183-185.mclnva23.covad.net) |
14:49.18 |
*** part/#brlcad thing0
(n=ric@58.171.117.63) |
15:03.27 |
yukonbob |
waves in, packs out -- later
cadheads |
15:04.28 |
brlcad |
howdy cya yukonbob |
15:04.29 |
CIA-21 |
BRL-CAD: 03brlcad * r30982 10/brlcad/trunk/
(include/magic.h src/libbu/magic.c): sort entries so they are
alphabetical by group and consistent with the header (though
noteworthy that not all in the header are listed here) |
15:27.20 |
CIA-21 |
BRL-CAD: 03brlcad * r30983 10/brlcad/trunk/ (4
files in 2 dirs): rename BUHOOK to BU_HOOK for
consistency |
15:42.18 |
*** join/#brlcad andrecastelo
(n=chatzill@189.71.26.193) |
15:43.22 |
andrecastelo |
good morning everyone :D |
15:43.48 |
prasad_ |
gmorning |
16:32.27 |
*** join/#brlcad Axman6
(n=Axman6@pdpc/supporter/student/Axman6) [NETSPLIT
VICTIM] |
16:32.27 |
*** join/#brlcad vedge
(i=vedge@vedge.org) [NETSPLIT VICTIM] |
16:32.30 |
*** join/#brlcad mafm
(n=mafm@elnet-111.lip.pt) [NETSPLIT VICTIM] |
17:00.18 |
*** join/#brlcad quentusrex
(n=quentusr@c-71-197-244-228.hsd1.or.comcast.net) |
18:01.25 |
*** join/#brlcad Elperion
(n=Bary@p54875C42.dip.t-dialin.net) |
18:07.29 |
brlcad |
hello quentusrex |
18:11.17 |
*** join/#brlcad docelic
(n=docelic@78.134.199.54) |
18:14.47 |
mafm |
:) |
18:14.57 |
mafm |
that looked like a tsunami |
18:15.07 |
mafm |
see you tomorrow! |
18:15.11 |
brlcad |
see ya! |
18:29.28 |
CIA-21 |
BRL-CAD: 03brlcad * r30984
10/brlcad/trunk/src/libbu/globals.c: missed commit for
BUHOOK |
18:52.06 |
CIA-21 |
BRL-CAD: 03brlcad * r30985 10/brlcad/trunk/ (5
files in 2 dirs): consolidate all of the magic functions, defines,
and other logic for magic number checking over into
magic.[ch] |
19:02.54 |
CIA-21 |
BRL-CAD: 03brlcad * r30986
10/brlcad/trunk/src/mged/clone.c: clean up comments |
19:33.18 |
CIA-21 |
BRL-CAD: 03brlcad * r30987
10/brlcad/trunk/src/mged/attach.c: need ged.h for vo
funcs |
19:39.54 |
CIA-21 |
BRL-CAD: 03brlcad * r30988
10/brlcad/trunk/src/mged/mged.h: ws |
19:53.26 |
CIA-21 |
BRL-CAD: 03brlcad * r30989
10/brlcad/trunk/src/mged/clone.c: fix some places in the v4 support
where NAMESIZE needs to be used instead of CLONE_BUFSIZE, make
tracker pair up bu_free with the bu_calloc calls |
20:14.55 |
CIA-21 |
BRL-CAD: 03bob1961 * r30990
10/brlcad/trunk/misc/win32-msvc8/ (6 files in 6 dirs): Mods to get
things working with libged. |
20:17.28 |
CIA-21 |
BRL-CAD: 03bob1961 * r30991
10/brlcad/trunk/include/ (dg.h ged.h raytrace.h): Mods related to
moving things from librt to libged. |
20:20.20 |
CIA-21 |
BRL-CAD: 03bob1961 * r30992 10/brlcad/trunk/
(4 files in 4 dirs): Update to 7.12.3 |
20:21.37 |
CIA-21 |
BRL-CAD: 03bob1961 * r30993
10/brlcad/trunk/src/librt/track.c: This moved to libged. |
20:22.24 |
CIA-21 |
BRL-CAD: 03bob1961 * r30994
10/brlcad/trunk/src/librt/ (importFg4Section.c wdb_comb_std.c):
This moved to libged. |
20:26.08 |
CIA-21 |
BRL-CAD: 03bob1961 * r30995
10/brlcad/trunk/src/ (57 files in 5 dirs): Mods related to moving
things from librt to libged. |
20:38.30 |
CIA-21 |
BRL-CAD: 03bob1961 * r30996
10/brlcad/trunk/include/raytrace.h: Add ifdef __RTGEOM_H__ around
rt_bot_sort_faces and rt_bot_decimate declarations. |
22:08.37 |
CIA-21 |
BRL-CAD: 03brlcad * r30997
10/brlcad/trunk/src/libged/Makefile.am: need importFg4Section.c
track.c wdb_comb_std.c |
22:27.15 |
CIA-21 |
BRL-CAD: 03brlcad * r30998
10/brlcad/trunk/src/other/tcl/generic/regex.h: |
22:27.15 |
CIA-21 |
BRL-CAD: revert 30995 as regfree does need to
be defined to TclReFree else unresolved |
22:27.15 |
CIA-21 |
BRL-CAD: symbols on other platforms. the
problem (presumably on windows) is probably the |
22:27.15 |
CIA-21 |
BRL-CAD: build finding the
src/other/libregex/regex.h header before tcl's from |
22:27.16 |
CIA-21 |
BRL-CAD: src/other/tcl/generic/regex.h; the
include paths should include tcl first in |
22:27.18 |
CIA-21 |
BRL-CAD: order for tcl to compile its regex
interface. |
22:32.13 |
*** part/#brlcad pacman_87
(n=timothy@nat-204-179.arlut.utexas.edu) |