| 00:20.31 | crdueck | brlcad: i've just about finished working on the basic primitives with exactly computable volume/surface area. the remaining primitives are either the more exotic ones like bot, arbn, ars, or inexact ones involving ellipses or hyperbola. theres a number of good approximation formulas for ellipses and hyperbolas, what would you reccommend working on next? |
| 00:34.46 | *** join/#brlcad archivist (~archivist@host81-149-189-98.in-addr.btopenworld.com) | |
| 00:45.17 | CIA-55 | BRL-CAD: 03Cprecup 07http://brlcad.org * r3959 10/wiki/User:Cprecup/GSoC2012_progress: 25/06/2012 - commits + view, tcl |
| 01:48.21 | *** join/#brlcad xth1 (~thiago@187.106.55.234) | |
| 02:01.00 | CIA-55 | BRL-CAD: 03starseeker * r51336 10/brlcad/trunk/src/librt/test_botpatches.cpp: Experiment with different ways to structure bot probing. |
| 04:05.24 | *** join/#brlcad Jak_o_Shadows (~Fake@unaffiliated/jak-o-shadows/x-0479135) | |
| 05:08.15 | brlcad | source tarballs are uploaded, staged for 3 days |
| 06:30.11 | *** join/#brlcad ``Erik (~erik@pool-108-3-186-191.bltmmd.fios.verizon.net) | |
| 07:31.51 | *** join/#brlcad tofu_ (~sean@BZ.BZFLAG.BZ) | |
| 08:05.31 | *** join/#brlcad KimK (~Kim__@209.248.147.2.nw.nuvox.net) | |
| 08:26.06 | *** join/#brlcad ksuzee (~ksu@46.149.82.166) | |
| 08:26.34 | *** join/#brlcad d_rossberg (~rossberg@BZ.BZFLAG.BZ) | |
| 08:29.29 | CIA-55 | BRL-CAD: 03d_rossberg * r51337 10/rt^3/tags/rel-7-22-0/: tag the C++ core interface with the corresponding BRL-CAD version (i.e. 7.22.0) |
| 09:56.41 | ksuzee | hello! Could anybody helped me with g-xxx_facets program? What extension has the output file have? |
| 09:57.05 | ksuzee | I need it for testing program after reduction |
| 10:50.13 | *** join/#brlcad jordisayol (~jordisayo@unaffiliated/jordisayol) | |
| 10:51.30 | jordisayol | uploaded Linux packages for release 7.22.0 |
| 11:48.21 | tofu_ | jordisayol: awesome, thank you |
| 11:57.22 | jordisayol | brlcad: should i mark this folder as stage? |
| 11:57.53 | brlcad | do you know if it can be unmarked as stage? |
| 11:58.07 | jordisayol | no idea |
| 11:58.36 | jordisayol | can i create a temp folder and test it? |
| 11:58.38 | brlcad | looks like it |
| 11:59.05 | brlcad | yeah, sure -- mark it |
| 11:59.21 | brlcad | then we can unmark all of them at the same time |
| 11:59.31 | jordisayol | ok |
| 12:02.22 | jordisayol | it can be "un-staged" without problems, so you can do it for linux folder when you unmark the source one |
| 12:07.57 | brlcad | looks like I should have just created all of them at the same time then they'd all automatically unstage |
| 12:08.19 | brlcad | assuming they all get populated, of course :) |
| 12:11.18 | jordisayol | brlcad: there is a minor problem. I've marked 7.22.0 Linux folder as stage, but the default download is to brlcad*7.22.0* release :-/ |
| 12:12.20 | jordisayol | Now I know for the next time, mark first as stage, then upload packages... |
| 12:24.39 | CIA-55 | BRL-CAD: 03Phoenix 07http://brlcad.org * r3960 10/wiki/User:Phoenix/GSoc2012/Reports: /* Week 6 */ |
| 12:25.36 | brlcad | jordisayol: none of them say they're marked as the default download |
| 12:25.42 | brlcad | maybe just takes time to propagate? |
| 12:27.06 | jordisayol | yes, i never mark linux packages as default, just let sourceforge choose the last one |
| 12:27.26 | brlcad | nods |
| 12:27.34 | brlcad | I just set brlcad_7.20.6-0_amd64.deb and will unmark when unstaged |
| 12:28.45 | jordisayol | ok, it works, and if we unmark them now? will keep these? |
| 12:29.58 | brlcad | dunno, maybe |
| 12:30.01 | brlcad | give it a try |
| 12:30.31 | jordisayol | i'll do, just to override that fedora users download deb packages |
| 12:42.51 | jordisayol | brlcad: unfortunately, if I unmark brlcad_7.20.6-0_amd64.deb as default, it returns to 7.22.0 one :-/ |
| 12:43.14 | jordisayol | no problem, I'll do better next time |
| 13:04.50 | brlcad | it may be a limitation of their system anyways |
| 13:04.58 | brlcad | or only visible to you since you can see staged folders |
| 13:05.09 | brlcad | you'd have to look while being logged out |
| 13:06.20 | jordisayol | yes, I do logged out, from Ubuntu, Fedora and opensuse (virtualbox machines) and the result was the same, when unmark it, returns the 7.22.0 |
| 13:06.53 | brlcad | okay |
| 13:07.11 | brlcad | so either a limitation of the staging feature or because the folder/files were first added unstaged |
| 13:07.22 | brlcad | we'll find out next month or thereafter perhaps ;) |
| 13:10.09 | jordisayol | will see. anyway, next time, if you don't create it, I'll do staged before to upload anything |
| 13:38.56 | CIA-55 | BRL-CAD: 03phoenixyjll * r51338 10/brlcad/trunk/src/librt/primitives/brep/brep_debug.cpp: Copy the transformation matrix. |
| 13:40.46 | CIA-55 | BRL-CAD: 03Phoenix 07http://brlcad.org * r3961 10/wiki/User:Phoenix/GSoc2012/Reports: /* Week 6 */ |
| 13:50.38 | CIA-55 | BRL-CAD: 03phoenixyjll * r51339 10/brlcad/trunk/src/librt/primitives/brep/brep_debug.cpp: Another approach: copy all data from the old tree first. |
| 13:55.06 | CIA-55 | BRL-CAD: 03Phoenix 07http://brlcad.org * r3962 10/wiki/User:Phoenix/GSoc2012/Reports: /* Week 6 */ |
| 14:29.18 | *** join/#brlcad stas (~stas@82.208.133.12) | |
| 15:05.55 | CIA-55 | BRL-CAD: 03phoenixyjll * r51340 10/brlcad/trunk/src/librt/primitives/ (ehy/ehy_brep.cpp epa/epa_brep.cpp): Fix comment. |
| 15:06.56 | *** part/#brlcad jordisayol (~jordisayo@unaffiliated/jordisayol) | |
| 15:18.46 | *** join/#brlcad Al_Da_Best (~Al_Da_Bes@5e0e150d.bb.sky.com) | |
| 15:56.47 | CIA-55 | BRL-CAD: 03n_reed * r51341 10/brlcad/trunk/src/other/step/ (include/express/object.h src/express/object.c): Address warning about indexing with char type values based on ASCII characters (same problem as in r51103). Unlikely to be a problem in this case so just quell by casting to int. SCL git 512968e and 425a9c3. |
| 15:58.12 | *** join/#brlcad n_reed (~molto_cre@BZ.BZFLAG.BZ) | |
| 16:11.03 | *** join/#brlcad stas (~stas@188.24.50.251) | |
| 17:16.45 | *** join/#brlcad KimK (~Kim__@2001:470:1f0f:1042:4261:86ff:fe43:bcad) | |
| 17:24.11 | *** join/#brlcad ksuzee (~ksu@193.151.105.83) | |
| 17:33.32 | CIA-55 | BRL-CAD: 03r_weiss * r51342 10/brlcad/trunk/src/tclscripts/mged/grouper.tcl: Update to gr/grouper mged command to fix a memory leak. |
| 17:34.58 | CIA-55 | BRL-CAD: 03n_reed * r51343 10/brlcad/trunk/src/other/step/src/ (3 files in 2 dirs): Some unapplied changes from SCL git a362210, 696d8e3, and 2b46efb, mostly fixing STEPattribute::is_null. |
| 17:56.44 | CIA-55 | BRL-CAD: 03Ksuzee 07http://brlcad.org * r3963 10/wiki/User:Ksuzee/Reports: |
| 17:57.52 | *** join/#brlcad KimK (~Kim__@209.248.147.2.nw.nuvox.net) | |
| 18:49.04 | *** join/#brlcad anuragmurty (~anurag@14.139.128.12) | |
| 18:59.10 | CIA-55 | BRL-CAD: 03n_reed * r51344 10/brlcad/trunk/src/other/step/src/clutils/ (CMakeLists.txt dirobj.cc): need shlwapi for Windows path handling routines; SCL git 02feb6f |
| 19:35.54 | CIA-55 | BRL-CAD: 03n_reed * r51345 10/brlcad/trunk/src/other/step/src/clstepcore/ (STEPaggregate.cc read_func.cc read_func.h): simplify function prototype; SCL git 07d8791 |
| 19:41.45 | CIA-55 | BRL-CAD: 03Plussai 07http://brlcad.org * r3964 10/wiki/User:Plussai/GSoC_2012_log: /* 22 June 2014 */ |
| 19:42.16 | CIA-55 | BRL-CAD: 03Plussai 07http://brlcad.org * r3965 10/wiki/User:Plussai/GSoC_2012_log: /* 26 June 2014 */ |
| 19:42.31 | CIA-55 | BRL-CAD: 03Plussai 07http://brlcad.org * r3966 10/wiki/User:Plussai/GSoC_2012_log: /* 24 June 2014 */ |
| 19:42.50 | CIA-55 | BRL-CAD: 03Plussai 07http://brlcad.org * r3967 10/wiki/User:Plussai/GSoC_2012_log: /* 22 June 2014 */ |
| 19:43.07 | CIA-55 | BRL-CAD: 03Plussai 07http://brlcad.org * r3968 10/wiki/User:Plussai/GSoC_2012_log: /* 20 June 2014 */ |
| 19:43.25 | CIA-55 | BRL-CAD: 03Plussai 07http://brlcad.org * r3969 10/wiki/User:Plussai/GSoC_2012_log: /* 16 June 2014 */ |
| 19:43.46 | CIA-55 | BRL-CAD: 03Plussai 07http://brlcad.org * r3970 10/wiki/User:Plussai/GSoC_2012_log: /* 14 June 2014 */ |
| 20:14.23 | *** join/#brlcad andrei (~andrei@5-12-79-193.residential.rdsnet.ro) | |
| 20:32.57 | CIA-55 | BRL-CAD: 03n_reed * r51346 10/brlcad/trunk/src/other/step/src/cleditor/CMakeLists.txt: add missing lib dependencies; SCL git d0293fd |
| 20:46.38 | CIA-55 | BRL-CAD: 03starseeker * r51347 10/brlcad/trunk/src/librt/ (CMakeLists.txt test_botpatches.cpp): More experiments - something a bit off... |
| 20:47.18 | CIA-55 | BRL-CAD: 03starseeker * r51348 10/brlcad/trunk/src/librt/CMakeLists.txt: Gah, didn't mean to uncomment test |
| 21:07.14 | *** join/#brlcad jordisayol (~jordisayo@unaffiliated/jordisayol) | |
| 21:07.38 | jordisayol | brlcad: did you made something to solve the "stage" problem? |
| 21:07.51 | brlcad | what do you mean? |
| 21:08.38 | jordisayol | all the files inside linux/7.22.0 folder appear marked as stage |
| 21:09.07 | brlcad | that's automatic |
| 21:09.17 | jordisayol | brlcad_7.22.0-0_amd64.deb is no maked as default linux download |
| 21:09.26 | brlcad | ah, so it was just a matter of time |
| 21:09.47 | jordisayol | ok :-) |
| 21:10.12 | jordisayol | did you unmark it as default for linux? |
| 21:10.49 | jordisayol | oh, sorry |
| 21:10.56 | jordisayol | my mistake |
| 21:11.40 | jordisayol | is brlcad_7.20.6-0_amd64.deb which I marked |
| 21:17.37 | jordisayol | so sorry, situation has not changed. if unmark default linux file, returns to 7.22.0 |
| 21:21.25 | jordisayol | the only difference is that all files inside linux/7.22.0 appears marked with (stage), but the behavior is the same that this morning... |
| 21:22.42 | CIA-55 | BRL-CAD: 03starseeker * r51349 10/brlcad/trunk/src/librt/test_botpatches.cpp: more experimentation |
| 21:35.24 | *** join/#brlcad cristina (~quassel@188.24.50.251) | |
| 22:00.54 | *** join/#brlcad cristina (~quassel@unaffiliated/cristina) | |
| 22:10.00 | ksuzee | brlcad: hello, Sean! I've made some new man pages and want to patch them. So can I do "svn add" or it's better to wait for tomorrow? (I mean your e-mail about commits in 24 hours) |
| 22:22.03 | CIA-55 | BRL-CAD: 03Ksuzee 07http://brlcad.org * r3971 10/wiki/User:Ksuzee/Reports: |
| 22:37.46 | CIA-55 | BRL-CAD: 03anrgmrty * r51350 10/brlcad/trunk/src/conv/g-voxel.c: voxelize removed from main() and made part of a function in g-voxel.c, miss() removed |
| 22:50.11 | CIA-55 | BRL-CAD: 03Anuragmurty 07http://brlcad.org * r3972 10/wiki/User:Anuragmurty: /* Development Log */ |
| 22:58.33 | *** part/#brlcad anuragmurty (~anurag@14.139.128.12) | |
| 23:30.52 | *** join/#brlcad Yoshi47 (~jan@d24-204-236-81.home4.cgocable.net) | |